17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM
In: IEEE International Solid-State Circuits Conference (ISSCC); Jg. 67 (2024-02-18) S. 330-332
Online
Konferenz
Zugriff:
Titel: |
17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM
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Autor/in / Beteiligte Person: | Tan, Fei ; Yu, Wei-Han ; Lin, Jinhai ; Un, Ka-Fai ; Martins, Rui P. ; Mak, Pui-In |
Link: | |
Quelle: | IEEE International Solid-State Circuits Conference (ISSCC); Jg. 67 (2024-02-18) S. 330-332 |
Veröffentlichung: | 2024 |
Medientyp: | Konferenz |
ISBN: | 979-8-3503-0620-0 (print) |
ISSN: | 2376-8606 (print) |
DOI: | 10.1109/ISSCC49657.2024.10454548 |
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