Exploiting Memory Soft Redundancy for Joint Improvement of Error Tolerance and Access Efficiency
In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Jg. 17 (2009-08-01), Heft 8, S. 973-982
Online
academicJournal
Zugriff:
Titel: |
Exploiting Memory Soft Redundancy for Joint Improvement of Error Tolerance and Access Efficiency
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Autor/in / Beteiligte Person: | Wang, S. ; Wang, L. |
Link: | |
Zeitschrift: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Jg. 17 (2009-08-01), Heft 8, S. 973-982 |
Veröffentlichung: | 2009 |
Medientyp: | academicJournal |
ISSN: | 1063-8210 (print) ; 1557-9999 (print) |
DOI: | 10.1109/TVLSI.2008.2001743 |
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