Efficient High Speed Implementation of Secure Hash Algorithm-3 on Virtex-5 FPGA
In: 17th Euromicro Conference on Digital System Design (DSD); (2014-08-01) S. 643-646
Online
Konferenz
Zugriff:
Titel: |
Efficient High Speed Implementation of Secure Hash Algorithm-3 on Virtex-5 FPGA
|
---|---|
Autor/in / Beteiligte Person: | Rao, Muzaffar ; Newe, Thomas ; Grout, Ian |
Link: | |
Quelle: | 17th Euromicro Conference on Digital System Design (DSD); (2014-08-01) S. 643-646 |
Veröffentlichung: | 2014 |
Medientyp: | Konferenz |
ISBN: | 978-1-4799-5793-4 (print) |
DOI: | 10.1109/DSD.2014.24 |
Sonstiges: |
|