A 3.2 GHz 178fsrms Jitter Injection Locked Clock Multiplier Using Sub-Sampling FTL and DLL for In-Band Noise Improvement
In: IEEE Asian Solid-State Circuits Conference (A-SSCC); (2021-11-07) S. 1-3
Online
Konferenz
Zugriff:
Titel: |
A 3.2 GHz 178fsrms Jitter Injection Locked Clock Multiplier Using Sub-Sampling FTL and DLL for In-Band Noise Improvement
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Autor/in / Beteiligte Person: | Yoon, Dong-Hyun ; Jung, Dong-Kyu ; Seong, Kiho ; Eom, Tae-Hyeok ; Han, Jae-Soub ; Kim, Ju Eon ; Kim, Tony Tae-Hyoung ; Baek, Kwang-Hyun |
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Quelle: | IEEE Asian Solid-State Circuits Conference (A-SSCC); (2021-11-07) S. 1-3 |
Veröffentlichung: | 2021 |
Medientyp: | Konferenz |
ISBN: | 978-1-6654-4350-0 (print) |
DOI: | 10.1109/A-SSCC53895.2021.9634762 |
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