Design of 17-Level Inverter with Reduced Switch Count
In: Innovations in Power and Advanced Computing Technologies (i-PACT); (2021-11-27) S. 1-8
Online
Konferenz
Zugriff:
Titel: |
Design of 17-Level Inverter with Reduced Switch Count
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Autor/in / Beteiligte Person: | Nyamathulla, Shaik ; C, Dhanamjayulu |
Link: | |
Quelle: | Innovations in Power and Advanced Computing Technologies (i-PACT); (2021-11-27) S. 1-8 |
Veröffentlichung: | 2021 |
Medientyp: | Konferenz |
ISBN: | 978-1-6654-2691-6 (print) |
DOI: | 10.1109/i-PACT52855.2021.9696784 |
Sonstiges: |
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